Hardware for Deep Learning. Part 4: ASIC | by Grigory Sapunov | Intento
Arch-Net: A Family Of Neural Networks Built With Operators To Bridge The Gap Between Computer Architecture of ASIC Chips And Neural Network Model Architectures - MarkTechPost
Intel: The Industry's First Structured ASIC (SASIC) for 5G, AI, and the Edge Explosion - YouTube
PDF] Efficient Processing of Deep Neural Networks | Semantic Scholar
Hardware Acceleration of Deep Neural Network Models on FPGA ( Part 1 of 2) | ignitarium.com
Hardware for Deep Learning. Part 4: ASIC | by Grigory Sapunov | Intento
Drilling Into Microsoft's BrainWave Soft Deep Learning Chip - The Next Platform
Deep Learning Has Hit a Wall, Intel's Rao Says
An on-chip photonic deep neural network for image classification | Nature
A Breakthrough in FPGA-Based Deep Learning Inference - EEWeb
How to make your own deep learning accelerator chip! | by Manu Suryavansh | Towards Data Science
FPGA-based Accelerators of Deep Learning Networks for Learning and Classification: A Review
Space-efficient optical computing with an integrated chip diffractive neural network | Nature Communications
Blog: Aldec Blog - How to develop high-performance deep neural network object detection/recognition applications for FPGA-based edge devices - FirstEDA
Hardware for Deep Learning. Part 4: ASIC | by Grigory Sapunov | Intento